Powerlattice Raises $86 Million in Equity Offering, SEC Filing Shows – Unite.AI

Powerlattice Technologies Inc sold $86,009,965 of a $111,010,000 equity offering, according to the Vancouver, Washington-based startup’s Form D exempted offering notice filed with the U.S. Securities and Exchange Commission on Oct. 30, 2026. The company, which is developing a power delivery chiplet for AI processors, reported a first sale date of Oct. 15 2026.

Terms of the offer and investors

The notice lists a total bid amount of $111,010,000, of which $86,009,965 has already been sold and $25,000,035 remains to be sold. The securities are stocks, and the issuer has requested exemption under Rule 506(b), the Regulation D safe harbor commonly used for private placements without registration with the SEC. Eighteen investors had already invested, all accredited; the document lists no non-accredited investors, no minimum investment amounts, and no sales commissions or finders’ compensation.

The request constitutes a new filing rather than a modification of a prior notice. It was signed by Peng Zou, the company’s co-founder and CEO, on October 30, 2026, and SEC filing records show that the agency accepted it at 9:56 a.m. Eastern time that day. The document also indicates that the offer is not intended to last more than one year.

The issuer is a Delaware corporation incorporated in 2023, with an address listed as 203 SE Park Plaza Drive, Suite 210, in Vancouver, Washington, and its industry group listed as Other Technologies. The company declined to disclose a revenue range. The document names Zou, Sujith Dermal and Gang Ren as executive officers and directors, and Steve Fu, Pat Gelsinger and Wen Hsieh as directors.

Previous funding and foundation team

Powerlattice emerged stealthily on November 17, 2025, announcing a $25 million Series A round jointly led by Playground Global and Celesta Capital, and said at the time that it had raised $31 million in funding to date. Months earlier, the company had filed two previous exemptive offering notices, dated May 23, 2025, and May 27, 2025, according to EDGAR filing history, which also records the company’s previous name as PowerLattice Technologies Inc.

Powerlattice was founded by Zou, Gang Ren and Sujith Dermal and describes itself as a fabulous semiconductor company, with a founding team whose experience spans Qualcomm, NUVIA and Intel, as well as integrated magnetics, analog ICs, power management and systems design. With the Series A, Playground Global General Partner Pat Gelsinger and Celesta Capital Partner Dr. Steve Fu have joined the board. The company is headquartered in Vancouver, Washington; its hidden ad listed an additional office in Chandler, Arizona, and its October 2026 release also listed San Jose, California.

Chiplet technology and October demonstration

The company’s product is what it calls the industry’s first power delivery chiplet: an integrated voltage regulator, or IVR, integrated directly into the processor package to deliver power to the point of load vertically to the processor. Powerlattice describes a Rainier micro-IVR architecture that combines its PowerMagix miniaturized on-die magnetic inductors, control circuit innovations it calls programmable power array synchronization, and a programmable software layer, and claims an order-of-magnitude reduction in power noise compared to conventional motherboard power delivery.

The company claims that AI accelerators and GPUs are pushing beyond 2,000 watts per chip, and says its approach reduces total computing power needs by more than 50% — a reduction that it says can translate into a 2x or more performance increase on a fixed data center power budget.

On October 26, 2026, Powerlattice announced the successful demonstration of what it described as the industry’s first monolithic IVR chiplet, which integrates the controller, power transistors and inductors into a single chiplet. In the demonstration, the chiplet provided power to a high-precision silicon device that Powerlattice developed to emulate the wide-ranging loads and rapid changes in current demand of next-generation AI accelerators.

“By integrating point-of-load power delivery directly into the processor package, we give designers the flexibility to customize power delivery to their processors, whether using a single IVR chiplet or a synchronized array,” Zou said in the demo announcement.

At the time of the secret November 2025 announcement, the company said it had silicon on hand and engineering samples underway for GPUs, CPUs, and accelerators that draw more than 1,000 watts.